NTH

Designer Codes from GALA: Compact, Self-Dual, and Rate-1/2 QEC on Reconfigurable Atom Arrays

AuthorsWillers Yang, Casey Duckering, Arpit Dua

August 13, 2026 3 min read
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The one-line take

GALA designs compact quantum error-correcting codes that are built from the outset to fit the movement constraints and operations of neutral-atom quantum hardware.

Key results

132
Compact self-dual code block length

The self-dual code is [[132, 30, 12]] and uses 132 atoms.

3.1 ms
Compact-code QEC cycle

Syndrome extraction for [[132, 30, 12]] with four crossed AODs.

1e-8
Compact-code logical error rate

Estimated memory logical error below 1e-8 at physical error rate 1e-3.

6.76 ms
Rate-1/2 code QEC cycle

Cycle time for the girth-6 [[672, 336, 12]] code with four crossed AODs.

5e-11
Rate-1/2 code logical error rate

Extrapolated logical error rate for [[672, 336, 12]] at physical error rate 1e-3.

16
Maximum certified distance

The [[2232, 1120, 16]] GALA code has exactly certified distance 16.

What the paper found

This paper introduces GALA, or Group-Action Lifts with Active Orthogonality, a designer family of quantum low-density parity-check codes tailored to reconfigurable neutral-atom arrays such as QuEra’s platform. GALA combines a small non-abelian group, typically S3, to enforce selective CSS orthogonality and achieve rate 1/2 with distances exceeding stabilizer-check weight, with a large abelian cyclic factor that supplies code automorphisms, explicit AOD row-and-column movement schedules, and logical Clifford operations. Hardware compatibility and the logical instruction set become design inputs rather than post hoc tests. A search over compact constructions produced the self-dual [[132, 30, 12]] code, implementable with 132 atoms and a 3.1 ms syndrome-extraction cycle; circuit-level simulations estimate memory logical error below 1e-8 at physical error rate 1e-3. The girth-6 [[672, 336, 12]] code has a 6.76 ms cycle and an extrapolated logical error rate of 5e-11 at the same physical error rate, while larger certified-distance instances include [[1752, 880, 14]] and [[2232, 1120, 16]], both shorter than earlier hardware-compatible rate-1/2 benchmarks at comparable distance. ZX-dual GALA variants additionally support fold-transversal Hadamard and phase gates, including the compact self-dual code whose identity fold reduces these operations to single-qubit transversal layers. The work’s central contribution is a co-design framework linking group structure, code rate and distance, atom movement, decoding layout, and logical compilation.

Original abstract

High rate quantum low-density parity-check codes on reconfigurable neutral-atom arrays can reduce the overhead of quantum error correction, but near-term devices support only hundreds of qubits with limited reconfigurability from a few crossed acousto-optic deflectors (AOD). A practical code must be compact in addition to low-overhead, with checks and logical gates mapping onto hardware-compatible physical instructions. We introduce the GALA codes, or Group-Action Lifts with Active orthogonality, that lifts over a product group $G = H_k \times C_m$ (or $H_k \ltimes C_m^k$). The small non-abelian factor $H_k$ supplies active orthogonality, reaching $1/2$ rate with above-weight distance, while the large abelian factor $C_m$ supplies symmetries that give code automorphisms and explicit, simple AOD move schedules. Hardware compatibility and logical capability thereby become customizable inputs to a code search rather than properties verified post-hoc, making GALA designer codes by construction. The GALA family contains several previously discovered rate-1/2 Kasai codes of Ref. [arXiv:2601.08824, arXiv:2604.16209] while exposing simpler parameter bounds, logical operations, and ZX-dual variants with AOD-compatible fold-transversal Clifford gates. Our search yields a compact self-dual $[[132, 30, 12]]$ with a small number of $4$-cycles (almost girth-6) and below $10^{-8}$ logical error rate (LER) for memory at $10^{-3}$ physical error rate, 3.1ms syndrome-extraction cycle and transversal Clifford gates; a girth-6, rate-$1/2$ $[[672, 336, 12]]$ with a 6.76ms cycle with below $10^{-10}$ LER (extrapolated) and rate-$1/2$ barrier-breaking $[[1752, 880, 14]]$ and $[[2232, 1120, 16]]$ with exactly certified distances greater than check weights and all smaller than previously known hardware compatible rate-1/2 codes.

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