CircuitProver: Agentic Lean 4 Theorem Proving with Reusable Circuit Proof Library for Hardware Verification
AuthorsZiyi Yang, Wenji Fang, Chen Chen, Zhiyao Xie, Hongce Zhang
Resources
CircuitProver uses an AI agent and reusable Lean proof libraries to make formal hardware verification faster and more transferable across related circuit designs.
Key results
Parameterized Chisel hardware verification tasks in the benchmark.
CircuitProver solved 63/63 benchmark tasks.
Matched vanilla agent solved 58/63 tasks.
Average reduction relative to the vanilla agent.
Average reduction in proof lines of code relative to the vanilla agent.
Claude Opus 4.8 solved every benchmark task.
What the paper found
Researchers at the Hong Kong University of Science and Technology in Guangzhou and Hong Kong present CircuitProver, a Lean 4 framework for agentic hardware verification that translates parameterized Chisel designs and natural-language specifications into executable, machine-checkable models. Unlike model checking, which verifies each instantiated circuit separately, CircuitProver proves symbolic correctness across an entire parameter family, then distills successful proof trajectories into two reusable resources: a Proof Guidance Library of strategies and a Lean-Checked Theorem Library of generalized lemmas. Its hardware-aware workflow decomposes combinational proofs into arithmetic and bit-vector obligations, while sequential proofs use one-step transition lemmas and inductive invariants, with iterative repair driven by Lean feedback. On a benchmark of 63 parameterized tasks spanning arithmetic, control, memory, and miscellaneous circuits, CircuitProver solved 63/63, or 100.0%, compared with 92.1% for a vanilla agent. Relative to that baseline, it reduced average proof rounds by 50.0%, verification time by 23.2%, and proof length by 16.3%. Ablations show that proof guidance cut full-coverage search from 29 to 18 rounds, while the combined libraries reached all 63 tasks. Using Anthropic’s Claude models through Claude Code, performance scaled from 31/63 with Haiku 4.5 to 63/63 with Opus 4.8, which also achieved the lowest average time, proof length, token usage, and rounds. A carry-skip-adder case study demonstrates transfer of generalized block-arithmetic lemmas across related circuits.
Original abstract
Modern integrated circuits (ICs) are becoming increasingly complex, making functional verification a major bottleneck. The dominant hardware formal verification methodology, model checking, verifies each design instance separately and exposes only pass/fail results, so the reasoning behind a proof stays locked inside solver heuristics and is repeatedly reconstructed across related designs. Interactive theorem proving instead yields explicit, reusable proof artifacts, but applying it to hardware remains largely manual, demanding expert effort for formalization, invariant discovery, and proof development. In this paper, we present CircuitProver, an agentic Lean 4-based verification framework supporting proof-accumulation and parameterized verification. CircuitProver automatically translates parameterized hardware designs and their natural language specifications into executable Lean 4 models. It then iteratively constructs machine-checked proofs through Lean feedback to establish that the hardware code complies with the specification. The proving traces and verified theorems are distilled into reusable libraries, where proving strategies guide future agent reasoning and verified lemmas support formal proof reuse across related hardware verification tasks. We further introduce the first benchmark suite for evaluating agentic hardware theorem proving, covering diverse parameterized hardware designs, specifications, proof tasks, and evaluation metrics. Across 63 tasks, CircuitProver successfully proves all benchmarks, while a vanilla agent solves 92.1% of them and requires twice as many proof rounds on average. Ablation studies show that accumulated proof knowledge reduces redundant proof construction across related verification tasks, reducing proof length by 16.3% and verification time by 23.2%.
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