NTH

Efficient LLM-Generated Shuttling Compilers for Complex Trapped-Ion Architectures

AuthorsFabian Kreppel, Reza Salkhordeh, Ferdinand Schmidt-Kaler, André Brinkmann

July 28, 2026 3 min read
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The one-line take

Frontier LLMs can autonomously generate competitive trapped-ion shuttling compilers, potentially cutting compiler development from months to days.

Key results

76%
Linear timestep reduction

Maximum reduction versus the hand-crafted linear compiler.

39%
Branched timestep reduction

Maximum reduction versus the hand-crafted junction-based compiler.

153
Circuit-library size

Number of circuits in the primary benchmark library.

50
Largest benchmark circuits

Maximum number of qubits in scalable benchmark circuits.

90%
Architecture-connectivity reduction

Maximum timestep reduction on dense layouts relative to sparse corridor-like layouts.

What the paper found

Researchers Fabian Kreppel, Reza Salkhordeh, Ferdinand Schmidt-Kaler, and André Brinkmann at Johannes Gutenberg University Mainz and Saarland University show that Anthropic’s unmodified Claude Opus 4.7 can generate complete Python shuttling compilers for trapped-ion quantum computers directly from written specifications. Their chained workflow progresses from a linear segmented trap to junction-and-stack architectures and then to general connected trap graphs, using circuit-DAG-weighted qubit matching, ready-gate scheduling, graph-aware routing, cycle detours, stack parking, and a gate-vertex rotor fallback. Follow-up prompts optimize the emitted code without manual algorithmic engineering. Against specialized hand-crafted compilers, the generated linear compiler cuts shuttling timesteps by up to 76%, while the junction-based compiler cuts them by up to 39%; benchmarks include 153 library circuits and scalable QAOA, QFT, Quantum Volume, XEB, and XEB_Sy workloads reaching 50 qubits. Across 10 architectures, connectivity is a first-order factor: dense, junction-rich layouts can require up to 90% fewer timesteps than sparse corridor-like layouts. A general compiler trades specialization for coverage, running up to 6.8 times worse than the linear specialist and 2.6 times worse than the branched specialist, although it can outperform specialists on dense graphs. Repeating the study with Anthropic’s Claude Fable 5 reproduces the qualitative findings, supporting the methodology rather than a single model. The approach reduces architecture-specific compiler development from several months to a few days, but future work must address multiple gate zones, parallel scheduling, and complete routing on every connected graph.

Original abstract

Trapped-ion quantum computers rely on shuttling compilers, which cast an input algorithm into a sequence of ion-qubit movements within a given architecture. We present the first study in which a single frontier large language model (LLM), Claude Opus 4.7, generates and iteratively refines the full Python code of shuttling compilers from written specifications. We start with a compiler for (i) a linear segmented trap, extend it to (ii) a trap with junctions, and finally achieve efficient compilation for (iii) a broad class of connected trap graphs. The compilers for the more general cases are seeded with code from the previous ones. We benchmark the LLM-generated compilers against state-of-the-art hand-crafted ones using a common suite of quantum circuits. The number of shuttling timesteps is reduced by up to 76% for (i) and up to 39% for (ii). For the broad case (iii) of freely connected architectures, we find large variations in the required number of shuttling timesteps, depending on the connectivity. A densely connected, junction-rich architecture yields an order-of-magnitude reduction in shuttling timesteps compared to a corridor-like one. Repeating the complete generation and evaluation with a second frontier LLM, Claude Fable 5, reproduces these findings, with the Fable 5 compilers surpassing the hand-crafted ones more often on the largest circuits. Our results show that an unmodified frontier LLM can produce working, correct, and competitive shuttling compilers without additional manual algorithmic engineering, thus reducing the development time for new architectures from several months to a few days.

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